Hynix 2GB DDR2 PC2-5400 (667) Single Channel Server Memory
Scan code: LN29637
Manufacturer code: HYMP125F72CP8D3-Y5-C
End Of Life
Hynix 2GB DDR2 PC2-5400 (667) Single Channel Server Memory
2GB Hynix Server, DDR2, PC2-5400 (667MHz), 240pins, ECC Fullybuffered, CL 5
Scan code:
LN29637
Manufacturer code:
HYMP125F72CP8D3-Y5-C
This product is no longer available to purchase.
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Product Overview
This Hynix’s Fully Buffered DIMM is a high-bandwidth & large capacity channel solution that has a narrow host interface. Hynix’s FB-DIMM features novel architecture including the Advanced Memory Buffer that isolates the DDR2 SDRAMs from the channel.
This single component located in the front side centre of each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the host controller and the DDR2 SDRAMs including data in and output. Features • 240 pin Fully Buffered ECC Dual-In-Line DDR2 SDRAM Module.
• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply.
• All inputs and outputs are compatible with SSTL_1.8 interface.
• Host interface and AMB component industry standard compliant.
• MBIST, IBIST test functions.
• 8 Bank architecture.
• OCD (Off-Chip Driver Impedance Adjustment).
• ODT (On-Die Termination).
• Fully differential clock operations (CK & /CK).
• Programmable Burst Length 4 / 8 with both sequential and interleave mode.
• Auto refresh and self refresh supported.
• 8192 refresh cycles / 64ms.
• Serial presence detect with EEPROM.
• 133.35 x 30.35 mm form factor.
• Full DIMM Heat Spreader.
• This product is in compliance with the directive pertaining of RoHS.
This single component located in the front side centre of each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the host controller and the DDR2 SDRAMs including data in and output. Features • 240 pin Fully Buffered ECC Dual-In-Line DDR2 SDRAM Module.
• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply.
• All inputs and outputs are compatible with SSTL_1.8 interface.
• Host interface and AMB component industry standard compliant.
• MBIST, IBIST test functions.
• 8 Bank architecture.
• OCD (Off-Chip Driver Impedance Adjustment).
• ODT (On-Die Termination).
• Fully differential clock operations (CK & /CK).
• Programmable Burst Length 4 / 8 with both sequential and interleave mode.
• Auto refresh and self refresh supported.
• 8192 refresh cycles / 64ms.
• Serial presence detect with EEPROM.
• 133.35 x 30.35 mm form factor.
• Full DIMM Heat Spreader.
• This product is in compliance with the directive pertaining of RoHS.
